Abstract: The Standard Clock (SC) method is an efficient simulation approach to performance evaluation of Discrete Event Dynamic System(DEDS). In this paper, a new algorithm, Improved Standard Clock (ISC) method is proposed. ISC method has a close connection with the well-known variance-reduction techniques (VRT), conditional method. The clock, which is a core concept in the SC method, is no longer needed in the ISC method. Compared with SC method, ISC method has the advantages of less computation burden and higher evaluation precision. Finally, various examples including both transient and steady state performance evaluations are provided to certify the ISC method. The results have shown the power and simplicity of the ISC method.