基于TVM的端侧动态自适应块稀疏策略

Edge Dynamic Adaptive Block Sparsity Strategy Based on TVM

  • 摘要: 针对基于张量虚拟机(TVM)编译栈的端侧模型部署中,默认固定块大小机制难以适配网络层差异化权重分布,导致稀疏表达能力与硬件执行效率存在结构性失配的问题,本文提出一种面向编译器的动态自适应块稀疏(DABS)策略。该方法建立在稀疏粒度与存储代价的理论模型之上,从信息论与底层约束视角严谨推导临界稀疏度;通过构建动态块选择算法,将稀疏化过程建模为多目标优化问题,自适应寻找最优块粒度;同时引入结构回退机制,解决高稀疏区对齐失效并有效抑制索引膨胀。实验表明,DABS在开放神经网络交换(ONNX)与TensorFlow Lite(TFLite)基准上的平均压缩比分别达1.681与1.993。与6种主流方案相比,DABS在保持89.8%高精度的前提下,实现了136 kB的极致体积与33.3 ms的低推理延迟,展现出显著的帕累托最优特性。此外,在Cortex-M55真机实测中,该策略在微型网络、ResNet主干及BERT-tiny等架构上均展现出强大泛化能力,最高压缩率达40.6%。DABS在无需重训练下将稀疏矩阵行连续性提升59.8%,通过削减跨存储层级I/O负担实现真机非线性推理加速,有效突破端侧访存瓶颈,具备极高工程应用价值。

     

    Abstract: In edge model deployment based on the tensor virtual machine (TVM) compilation stack, the default fixed block size mechanism struggles to accommodate the differential weight distributions across network layers, leading to a structural mismatch between sparse representation capability and hardware execution efficiency. To address this issue, we propose a compiler-oriented Dynamic adaptive block sparsity (DABS) strategy. Built upon a theoretical model of sparsity granularity and storage cost, this method rigorously derives the critical sparsity from the perspectives of information theory and underlying hardware constraints. By constructing a dynamic block selection algorithm, it formulates the sparsification process as a multi-objective optimization problem to adaptively search for the optimal block granularity. Simultaneously, a structural fallback mechanism is introduced to resolve alignment failures in highly sparse regions and effectively suppress index bloating. Experimental results demonstrate that DABS achieves average compression ratios of 1.681 and 1.993 on the Open Neural Network Exchange (ONNX) and TensorFlow Lite (TFLite) benchmarks, respectively. Compared with six mainstream schemes, DABS realizes an ultra-compact model size of 136 kB and a low inference latency of 33.3 ms while maintaining a high accuracy baseline of 89.8%, exhibiting significant Pareto optimality. Furthermore, in on-device evaluations using the Cortex-M55, this strategy demonstrates robust generalization capabilities across diverse architectures, including micro-networks, ResNet backBones, and BERT-tiny, achieving a maximum compression rate of 40.6%. Without the need for retraining, DABS improves the row continuity of sparse matrices by 59.8%. By substantially mitigating the cross-hierarchy I/O burden, it achieves non-linear inference acceleration on real silicon, effectively breaking through the memory wall bottleneck of edge devices and demonstrating immense engineering application value.

     

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