QIAN Yi, WANG Qin, WU Wei, YAN Xiao-feng. Digital VLSI Design and Realization for Artificial Neural Network Algorithms[J]. INFORMATION AND CONTROL, 2008, 37(5): 615-620.
Citation: QIAN Yi, WANG Qin, WU Wei, YAN Xiao-feng. Digital VLSI Design and Realization for Artificial Neural Network Algorithms[J]. INFORMATION AND CONTROL, 2008, 37(5): 615-620.

Digital VLSI Design and Realization for Artificial Neural Network Algorithms

  • A general artificial neural network parallel processor APP(ANN's Parallel Processor) with 8,16,32 bit data modes based on MIMD(Multiple Instruction Multiple Data) architecture is proposed,of which the data bit can be changeable.The key operation units and the inner data path are optimized,and the RISC-like instruction set is also customized with which several ANN algorithms can be realized.The APP processor is designed with the 0.25μm CMOS technology and is synthesized with tools from Cadence Inc.Experiement results show that comparing with other neural implementation ways,the proposed APP has a better performance in versatility and real-time ability.
  • loading

Catalog

    /

    DownLoad:  Full-Size Img  PowerPoint
    Return
    Return